Quantifying software performance, reliability and security: An architecture-based approach

TitleQuantifying software performance, reliability and security: An architecture-based approach
Publication TypeJournal Article
Year of Publication2007
AuthorsVS Sharma, and KS Trivedi
JournalJournal of Systems and Software
Volume80
Start Page493
Issue4
Pagination493 - 509
Date Published04/2007
Abstract

With component-based systems becoming popular and handling diverse and critical applications, the need for their thorough evaluation has become very important. In this paper we propose an architecture-based unified hierarchical model for software performance, reliability, security and cache behavior prediction. We employ discrete time Markov chains (DTMCs) to model software systems and provide expressions for predicting the overall behavior of the system based on its architecture as well as the characteristics of individual components. This approach also facilitates the identification of various bottlenecks. We illustrate its use through some case studies and also provide expressions to perform sensitivity analysis. © 2006 Elsevier Inc. All rights reserved.

DOI10.1016/j.jss.2006.07.021
Short TitleJournal of Systems and Software